Semiconductor integrated circuit device using four-terminal...

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device

Reexamination Certificate

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Details

C257S202000, C257S203000, C257S204000, C257S210000, C257S371000, C257SE27067, C257SE27108, C257SE27110

Reexamination Certificate

active

07365377

ABSTRACT:
In a semiconductor substrate of a first conductivity type, a first well region of the first conductivity type, second well regions of a second conductivity type, and a third well region of the second conductivity type are formed. The second well regions are formed in the semiconductor substrate excluding the region where the first well region has been formed. The third well region is formed under the first and second well regions in the semiconductor substrate in such a manner that a part of the third well region under the first well region is removed, thereby connecting the second well regions to one another electrically.

REFERENCES:
patent: 6194776 (2001-02-01), Amano et al.
patent: 6525394 (2003-02-01), Kuhn et al.
patent: 7049699 (2006-05-01), Masleid et al.
patent: 2004/0189651 (2004-09-01), Zatz et al.
patent: 11-251447 (1999-09-01), None

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