Electricity: electrical systems and devices – Safety and protection of systems and devices – Circuit interruption by thermal sensing
Reexamination Certificate
2002-06-06
2004-11-02
Salata, Jonathan (Department: 2837)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Circuit interruption by thermal sensing
C361S111000
Reexamination Certificate
active
06813130
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No.
2002-126554
, filed Apr. 26, 2002, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device including a protection circuit which prevents circuit breakdown by static electricity, a mounted substrate device on which the semiconductor integrated circuit device is mounted, and a method of removing power lines of a circuit group which are formed in the semiconductor integrated circuit device and which have different functions, particularly to a protection circuit included in the semiconductor integrated circuit device with mixed digital and analog circuits.
2. Description of the Related Art
A protection circuit (constituted of a protection diode, protection transistor, and the like) for protecting a circuit from electrostatic breakdown has previously been built into a large scale integrated circuit (hereinafter referred to as an LSI) which has a MOS transistor circuit. The protection circuit is constituted, for example, of a protection transistor, protection diode, and the like.
The protection circuit discharges static electricity so that the static electricity does not reach the MOS transistor circuit inside the LSI, and protects the MOS transistor circuit, when an electrostatic discharge (hereinafter referred to as an ESD) is generated in a signal input/output terminal of the LSI from a human body or various types of devices in handling the LSI before actually being mounted on a circuit substrate and used.
In recent years, there has been a tendency to mount a large number of circuits having other functions in one chip and to raise an integration degree of a system LSI. For example, there has been a tendency toward a further increasing demand for an LSI mixed/loaded with the digital and analog circuits such as an RF module integrated with an analog circuit and base band LSI in a portable apparatus.
When the analog and digital circuits are mounted in this mixed manner, interference between the analog and digital circuits has to be avoided. For example, when the digital circuit operates, noise is generated from power and ground lines, which effects the analog circuit.
However, when the influences of the noises are excessively worried about, if a power wire of a digital circuit part is not placed through an analog circuit part, due to concerns about noise, a current path for removing an ESD surge cannot be secured.
As described above, there is a problem that the power wire connected to a protection element of the conventional mixed LIS mixed/loaded with the digital and analog circuits is a factor which hinders accurate circuit operation of the analog circuit part. This is because the power noise resulting from a digital circuit operation and generated in the power wire inhibits signal propagation of the analog circuit part.
For example, suppose that an analog exclusive-use LSI and digital/analog mixed/loaded LSI are mounted on the circuit substrate. The analog exclusive-use LSI outputs an analog signal (gain signal having a certain voltage). The digital/analog mixed/loaded LSI includes an analog/digital (A/D) converter and digital signal processor (DSP). The A/D converter receives the analog signal, converts the analog signal to a digital signal, and transmits the digital signal to the DSP.
It is now assumed that the analog signal outputted from the analog exclusive-use LSI is received by the digital/analog mixed/loaded LSI, noise is then generated from the digital circuit by the DSP, and this noise turns into a power supply for the analog exclusive-use LSI. It is assumed that the digital and analog circuits are both driven by a power voltage of 1.5 V. It is assumed that a wobble width of the analog signal received by the A/D converter included in the digital/analog mixed/loaded LSI is 1.5 V, and a bit of the A/D converter for sensing the voltage is divided and used in ten bits, that is, 1024 ways. In this case, a change of about 1.46 mV in the analog signal is sampled as a digital signal. Therefore, when the power supply of the analog exclusive-use LSI only fluctuates by several percent due to the operation of the digital circuit, an erratic a operation occurs in the digital/analog mixed/loaded LSI. That is, the digital/analog mixed/loaded LSI receives the analog signal including the power noise of the LSI from the analog exclusive-use LSI, and the analog signal is calculated by the DSP. This causes a problem that the wrong data may be transferred to another circuit or chip.
Moreover, the ESD protection element of the LSI is urgently required in the step of sealing a silicon chip in a package, and packing, conveying or otherwise handling the LSI, and the step of mounting the LSI on the circuit substrate in a manufacturing process of the LSI. After the LSI is actually mounted on the circuit substrate and connected to the wiring of the circuit substrate, the capacitance of the whole circuit substrate increases, and the chance of the signal input/output terminal of the LSI being exposed. Therefore, the necessity of protection is reduced, and the ESD protection element is deleted with few problems.
BRIEF SUMMARY OF THE INVENTION
The present invention is generally directed to the area of electro-static protection of electronic devices. According to one aspect of the present invention, there is provided a semiconductor integrated circuit device that includes plural power wires and plural ground wires and is capable of performing plural functions. Such a circuit device may include a first power wire which supplies a power potential to a circuit having a first function; a first ground wire which supplies a ground potential to the circuit having the first function; a first protection circuit which is connected between the first power wire and the first ground wire, and protects the circuit having the first function; a second power wire which supplies a power potential to a circuit having a second function; a second ground wire which supplies a ground potential to the circuit having the second function; a second protection circuit which is connected between the second power wire and the second ground wire, and protects the circuit having the second function. The circuit device further includes an element which is disposed in at least one of plural intervals between the first power wire and the second power wire and between the first ground wire and the second ground wire, and brings one of the plural intervals into a disconnected state.
Moreover, according to another aspect of the present invention, there is provided a mounted substrate device including a semiconductor integrated circuit device as described above, wherein the element is a fuse element, and a circuit substrate on which the semiconductor integrated circuit device is mounted. The circuit substrate has a plurality of wire patterns connected to the first power wire, second power wire, first ground wire, and second ground wire.
Furthermore, according to another aspect of the present invention, there is provided a wire disconnecting method of a mounted substrate device. The method includes forming a semiconductor integrated circuit device as described above, wherein the element is a fuse element; mounting the semiconductor integrated circuit device on a circuit substrate; supplying a voltage to the fuse element in the semiconductor integrated circuit device; and disconnecting the fuse element. A fuse element brings one of the intervals into either one state of a connected state and a disconnected state.
REFERENCES:
patent: 5596466 (1997-01-01), Ochi
patent: 5991135 (1999-11-01), Saleh
patent: 6002568 (1999-12-01), Ker et al.
patent: 6075686 (2000-06-01), Ker
patent: 6411485 (2002-06-01), Chen et al.
patent: 6459555 (2002-10-01), Welbers et al.
patent: 3123984 (2001-01-01), None
patent: 2001-244338 (2001-09-01), None
patent: 2000-0012114 (200
Kabushiki Kaisha Toshiba
Oblon, Spivak, McClelland, Maier & Neustadt, P.C
Salata Jonathan
LandOfFree
Semiconductor integrated circuit device including protection... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor integrated circuit device including protection..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit device including protection... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3297261