Semiconductor integrated circuit device in which difficulties ca

Details Semiconductor integrated circuit device in which difficulties ca Semiconductor integrated circuit device in which difficulties ca

1978-05-31

1980-06-24

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307205, 307213, 307251, 307304, 357 42, H03K 1716, H03K 1772, H03K 1940, H01L 2702

Patent

active

042097134

ABSTRACT:
A semiconductor integrated circuit device comprising a CMOS circuit in which parasitic transistors form a parasitic thyristor circuit. In this device, noise absorption resistances are provided at the noise inputs to absorb noise which otherwise might become trigger pulses for the thyristors.

REFERENCES:
patent: 3601625 (1971-08-01), Redwine et al.
patent: 3712995 (1973-01-01), Steudel
patent: 3862441 (1975-01-01), Nabetani et al.
patent: 3934159 (1976-01-01), Nomiya et al.
patent: 3955210 (1976-05-01), Bhatia et al.
patent: 3956880 (1976-05-01), O'Connor
patent: 4015147 (1977-03-01), Davidson et al.
Dennehy et al., "Non-Latching Integrated Circuits", RCA Tech. Notes, TN. No. 876, 2/12/71, 4 pgs.

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