Static information storage and retrieval – Powering
Patent
1995-09-15
1996-11-19
Zarabian, A.
Static information storage and retrieval
Powering
365207, G11C 700
Patent
active
055770029
ABSTRACT:
A semiconductor static random access memory device includes an address decoder unit and a memory cell array implemented by field effect transistors, a differential amplifier circuit having a pair of bipolar transistors for increasing a potential difference indicative of a read-out data bit and a level shift circuit operative to change a voltage range of a selecting signal supplied to a field effect activation transistor coupled between the common emitter node of the bipolar transistors for activating the differential amplifier circuit, and the level shift circuit has a field effect switching transistor and a bipolar transistor coupled in series and another field effect switching transistor coupled between the collector node and the base node of the bipolar transistor so as to make the source-to-drain voltage of the field effect activation transistor large, thereby allowing the field effect activation transistor to stably operate in the saturated range.
REFERENCES:
patent: 4811292 (1989-03-01), Watanabe
patent: 5229967 (1993-07-01), Nogle
IEEE International Solid-State Circuits Conference; vol. 35, 1992, New York, pp. 212-286.
NEC Corporation
Zarabian A.
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