Semiconductor integrated circuit device having wiring layout for

Details Semiconductor integrated circuit device having wiring layout for Semiconductor integrated circuit device having wiring layout for

1997-09-29

1999-12-21

Ngo, Ngan V.

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular signal path connections

257210, 257211, 257665, 257776, H01L 2710, H01L 2358, H01L 2362, H01L 2348

Patent

active

060052651

ABSTRACT:
A semiconductor integrated circuit device capable of reducing delay of wiring as far as possible is provided. The semiconductor integrated circuit device comprises at least two sets of pairs of signal lines having first polarity and second polarity opposite thereto, wherein the signal line of the first polarity of the signal lines of the second set is disposed at the portion adjacent to the signal line of the first polarity of the signal lines of the first set, the signal line of the second polarity of the first set is disposed at the portion adjacent to the signal line of the first polarity of the second set, and the signal line of the second polarity of the second set is disposed at the portion adjacent to the signal line of the second polarity of the first set.

REFERENCES:
patent: 5534732 (1996-07-01), DeBrosse et al.
patent: 5625234 (1997-04-01), Suzuki et al.

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