Semiconductor integrated circuit device having reduced...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S678000, C257S691000, C257S735000, C257SE25011, C257SE25012

Reexamination Certificate

active

07576420

ABSTRACT:
In a semiconductor integrated circuit device including a semiconductor integrated circuit board having a mask ROM area and an internal bus and a programmable ROM which is mounted on the semiconductor integrated circuit board and which has a plurality of ROM connecting terminals, the ROM connecting terminals are electrically connected to a plurality of bus connecting terminals connected to the internal bus, respectively. The bus connecting terminals may be disposed around periphery of the semiconductor integrated circuit board, may be formed on the mask ROM area, and may be disposed on the internal bus. In this event, the ROM connecting terminals and the bus connecting terminals are electrically connected to each other using wire bonding technique.

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patent: 4525809 (1985-06-01), Chiba et al.
patent: 5805865 (1998-09-01), Mimura et al.
patent: 6580164 (2003-06-01), Ohie
patent: 7199469 (2007-04-01), Ishida et al.
patent: 7341198 (2008-03-01), Nishizawa et al.
patent: 2002/0027281 (2002-03-01), Goto
patent: 2004/0262775 (2004-12-01), Ohie
patent: 2005/0146018 (2005-07-01), Jang et al.
patent: 2008/0049483 (2008-02-01), Horiuchi
patent: 2008/0050862 (2008-02-01), Yano et al.
patent: 2001-267488 (2001-09-01), None
patent: WO2005/081181 (2005-01-01), None
Related U.S. Appl. No. 11/881,223, filed Jul. 26, 2007; Inventors: Koji Yano and Tomoki Segawa, Title: Method of Manufacturing a Single Chip Semiconductor Integrated Circuit Device Including a Mask ROM in a Short Time.
Related U.S. Appl. No. 11/881,227, filed Jul. 26, 2007; Inventor: Michihiro Horiuchi, Title: Semiconductor Integrated Circuit Device Including Semiconductor Integrated Circuit Board Supplied With No High Voltage.

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