Semiconductor integrated circuit device having nonvolatile...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185230

Reexamination Certificate

active

11397725

ABSTRACT:
A semiconductor integrated circuit device includes a memory cell array having a plurality of memory cell transistors arranged in a matrix form. The device further includes a high-voltage circuit area arranged in a peripheral area of the memory cell array and including a first high-voltage transistor having a current path which is connected at one end to a selected control gate and a second high-voltage transistor having a current path which is connected at one end to a first non-selected control gate adjacent to the selected control gate and configured to raise voltage applied to the selected control gate to program voltage by use of first capacitive coupling caused between the selected control gate and the first non-selected control gate by applying intermediate voltage approximately equal to voltage which makes the current path of the memory cell transistor conductive to the first non-selected control gate.

REFERENCES:
patent: 5973962 (1999-10-01), Kwon
patent: 6011287 (2000-01-01), Itoh et al.
patent: 6720612 (2004-04-01), Takeuchi et al.
patent: 6804150 (2004-10-01), Park et al.
patent: 2002/0145907 (2002-10-01), Byeon et al.
patent: 2003/0048662 (2003-03-01), Park et al.
patent: 10-302488 (1998-11-01), None
patent: 2002-280463 (2002-09-01), None

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