Patent
1988-06-16
1991-01-29
James, Andrew J.
357 49, 357 54, 357 71, H01L 2710, H01L 2348, H01L 2934
Patent
active
049890620
ABSTRACT:
A semiconductor integrated circuit device having multilayer power supply lines includes a plurality of power supply lines formed on a semiconductor chip for supplying power to the cells. The power supply lines are constructed by the multilayer structure having three different layer levels. First-level (lower) and third-level (upper) power supply lines are arranged in parallel so as to overlap each other. Second-level (intermittent) power supply lines are arranged in parallel so as to extend in a direction perpendicular to the first-level and third-level power supply lines. The overlapping first and third power supply lines are set at different potentials.
REFERENCES:
patent: 4654689 (1987-03-01), Fujii
patent: 4661815 (1987-04-01), Takayama et al.
patent: 4774559 (1988-09-01), Culican et al.
patent: 4857981 (1989-08-01), Matsumoto et al.
Fujii Shigeru
Kawauchi Kazuyuki
Takahashi Hiromasa
Fujitsu Limited
James Andrew J.
Ngo Ngan Van
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