Semiconductor integrated circuit device having input protective

Details Semiconductor integrated circuit device having input protective Semiconductor integrated circuit device having input protective

1993-05-18

1995-01-24

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

With pn junction isolation

257509, 257544, 257546, H01L 2704, H01L 2712

Patent

active

053844823

ABSTRACT:
An input protective circuit provided between a semiconductor integrated circuit and an input bonding pad formed on a semiconductor substrate includes an N or P type electric field intensity relaxing region for setting a clamp level of the input protective circuit. The electric field intensity relaxing region is formed between an N.sup.+ -type semiconductor region connected to an input wiring layer and a P.sup.+ -type semiconductor region connected to a reference potential wiring layer.

REFERENCES:
patent: 4739378 (1988-04-01), Ferrari et al.
patent: 4897757 (1990-01-01), Tailliet et al.
patent: 5208474 (1993-05-01), Yamagata et al.
patent: 5223737 (1993-06-01), Canclini
patent: 5247201 (1993-09-01), Becker

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