Semiconductor integrated circuit device having clock signal wiri

Details Semiconductor integrated circuit device having clock signal wiri Semiconductor integrated circuit device having clock signal wiri

1994-08-26

1996-07-02

Brown, Peter Toby

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular power supply distribution means

257211, 257773, H01L 23482

Patent

active

055325009

ABSTRACT:
In a semiconductor integrated circuit device, a clock signal wiring for transmitting a clock signal to flip-flops is constituted from a plurality of trunk clock signal lines connected to a clock driver, and a plurality of clock signal branch lines branching from the trunk clock signal lines. The flip-flops may be connected directly or indirectly via the clock signal branch lines to the trunk clock signal lines. In this instance, one of a pair of terminal ends of each trunk clock signal line is connected to the clock driver while the other terminal end is set as an open end, and the transmission loss in the trunk clock signal line is sufficiently small. Accordingly, as reflected waves of the input clock signal at both terminal ends are present in trunk clock signal line and the voltage waveform in trunk clock signal line presents a composite waveform of the incident wave and the reflected waves, the clock skew in the semiconductor integrated circuit device is suppressed to a very low level even where the semiconductor integrated circuit device is formed as a large scale integrated circuit.

REFERENCES:
patent: 4958092 (1990-09-01), Tanaka
patent: 5060045 (1991-10-01), Owada et al.
patent: 5254886 (1993-10-01), El-Ayat et al.
Saigo et al.; "Clock Skew Reduction Approach for Standard Cell"; IEEE 1990 Custom Integrated Circuits Conference CH 2860-5/90/0000/0087 1990 IEEE 16.4.1. to 16.4.4.
Jackson et al.; "Clock Routing for High-Performance ICs"; 27th ACM/IEEE Design Automation Conference; 1990 IEEE 0738-100X/90/0006/0573; pp. 573-579.

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