Semiconductor integrated circuit device having an integrally for

Details Semiconductor integrated circuit device having an integrally for Semiconductor integrated circuit device having an integrally for

1987-04-06

1988-11-15

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307246, 307303, 307446, 307450, 333240, 333246, 357 51, H03K 1901

Patent

active

047852020

ABSTRACT:
A semiconductor integrated circuit device according to the present invention comprising an electric circuit formed in a semiconductor substrate, said circuit including first and second nodes between which a potential difference is provided, a wiring of a large ground capacitance connected to the first node, and a bypass capacitor connected to the second node, said wiring and bypass capacitor being of an integral structure prepared by laminating an upper conductor film pattern connected to the second node via an insulating film on a lower conductor film pattern connected to the first node. A MIM-structure in which a wiring and a bypass capacitor are made integral is employed in the semiconductor integrated circuit device of the present invention, making it possible to eliminate the large area required for forming the independent bypass capacitor. Also, the ratio of the ground capacitance of the wiring to the capacitance of the bypass capacitor is constant regardless of the change in the length of the wiring.

REFERENCES:
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patent: 4114120 (1978-09-01), Lupter
patent: 4210885 (1980-07-01), Ho
patent: 4558235 (1985-12-01), White et al.
patent: 4609836 (1986-09-01), Koike
patent: 4626889 (1986-12-01), Yamamoto et al.
patent: 4654689 (1987-03-01), Fujii
patent: 4654690 (1987-03-01), Okada et al.
patent: 4663543 (1987-05-01), Sitch
1984 Ga As IC Symposium Abstract p. 11; "Capacitor Diode FET Logic (CDFL) circuit approach for Ga As IC's" R. C. Eden.

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