Semiconductor integrated circuit device having a sampling...

Details Semiconductor integrated circuit device having a sampling... Semiconductor integrated circuit device having a sampling...

2005-10-11

2005-10-11

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

C327S291000

Reexamination Certificate

active

06954096

ABSTRACT:
A semiconductor integrated circuit device is provided to reduce the adverse effect of PWM noise occurring in a PWM driving section on an analog voltage processing section in an IC, in which digital and analog circuits are combined on a single chip. A sampling signal generation circuit outputs a sampling signal St to an A/D converter at a predetermined time when “delay time td+allowance time ta” has elapsed from a start signal Sp. The delay time td is shorter than “the minimum time width of H level of PWM signal SPWM1−allowance time ta”. The delay time td is also time from the variation of level of the PWM signal SPWM1to actual variation in the passage of current through a power section.

REFERENCES:
patent: 4621224 (1986-11-01), Watabe et al.
patent: 5901128 (1999-05-01), Hayashi et al.
patent: 6094090 (2000-07-01), Yamauchi
patent: 59012314 (1984-01-01), None
patent: A-H09-153802 (1997-06-01), None
patent: WO 9403889 (1994-02-01), None

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