Semiconductor integrated circuit device for forming logic circui

Details Semiconductor integrated circuit device for forming logic circui Semiconductor integrated circuit device for forming logic circui

1991-08-01

1994-01-11

Carroll, J.

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

Having specific type of active device

257206, 257370, 257378, 257379, H01L 2702, H01L 2710

Patent

active

052784363

ABSTRACT:
Disclosed is an improved Bi-CMOS gate array for increasing integration density. The gate array includes a predetermined region for forming PMOS transistors, a predetermined region for forming bipolar transistors, a predetermined region for forming resistance elements, and a predetermined region for forming NMOS transistors. The resistance element region is formed adjacent to the bipolar transistor region, and, therefore, it is not necessary to provide any interconnection for forming a logic circuit including the resistance element connected to the bipolar transistor. An area occupied by interconnections on the semiconductor substrate is thus reduced, and, therefore the integration density is increased.

REFERENCES:
patent: 4958213 (1990-09-01), Eklund et al.
patent: 5066996 (1991-11-01), Hara et al.
Hanibuchi et al, "A Bipolar-PMOS Merged Basic Cell for 0.8.mu.m BiCMOS Sea-of-Gates", IEEE 1990 Custom Integrated Circuits Conference, pp. 4.2.1-4.2.4 .

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