Patent
1993-06-16
1995-08-22
MacDonald, Allen R.
395 21, 395 24, G06F 1518
Patent
active
054448220
ABSTRACT:
A semiconductor integrated circuit device electrically simulating a vital neural network includes neuron units. Each neuron unit includes a plurality of laterally connected synapse units, an accumulator for accumulatively adding the outputs of the final synapse unit in the lateral connection, and a nonlinear processor for carrying out a predetermined nonlinear operational processing on the output of the accumulator. The number of the neuron units and the number of synapse units per neuron unit satisfy a relation of an integer multiple. The number of regularly operating neuron units can be made equal to that of the synapse units per neuron unit, whereby it is possible to prevent the neuron units from performing meaningless operations and an efficient neural network can be obtained.
REFERENCES:
patent: 4994982 (1991-02-01), Duranton et al.
patent: 5115492 (1992-05-01), Engeler
The Lneuron Chip: A Digital VLSI with on Chip Learning Mechanism J. B. Theeten et al. Jul. 09, 1990 Int. Conf. on N N A 576-neuron wafer-scale CMOS circuit solves the 16 city traveling salesman problem in less than a tenth of a second.
M. Griffin, et al., "An 11-Million Transistor Neural Network Execution Engine", IEEE International Solid-State Circuits Conference (1991), pp. 180-181 and 313.
International Joint Conference of Neural Networks, 1990, II, pp. 527-535 and 537-544 (cited on p. 5 of specification).
Dorvil Richemond
MacDonald Allen R.
Mitsubishi Denki & Kabushiki Kaisha
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