Semiconductor integrated circuit device and standard cell...

Details Semiconductor integrated circuit device and standard cell... Semiconductor integrated circuit device and standard cell...

2006-01-17

2006-01-17

Jackson, Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

C257S204000, C257S206000, C257S207000, C438S128000, C438S129000

Reexamination Certificate

active

06987293

ABSTRACT:
First standard cells with no contact pattern and second standard cells having first contact patterns are placed on an area where a cell array is to be formed. Second contact patterns are additionally placed between the first standard cells. The second contact patterns are placed in an area that lacks a power supply capability.

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Kasem, M.; “A new generation of interconnect technology for high performance eletronics,” Electronics Manufacturing Technology Symposium, 1999. Twenty-Fourth IEEE/CPMT, Oct. 18-19, 1999, pp. 440-447.

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