Semiconductor integrated circuit device and process for fabricat

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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Details

36518513, 365 63, 257903, 257324, 257335, G11C 800

Patent

active

055724809

ABSTRACT:
Herein disclosed is a semiconductor integrated circuit device comprising a SRAM having its memory cell composed of transfer MISFETs to be controlled through word lines and drive MISFETs. The gate electrodes of the drive MISFETs and the gate electrodes of the transfer MISFETs of the memory cell, and the word lines are individually formed of different conductive layers. The drive MISFETs and the transfer MISFETs are individually arranged to cross each other in the gate length direction. The word lines are extended in the gate length direction of the gate electrodes of the drive MISFETs and caused to cross the gate electrodes of the drive MISFETs partially.

REFERENCES:
patent: 4958326 (1990-09-01), Sakurai
patent: 4977538 (1990-12-01), Anami et al.

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