Semiconductor integrated circuit device and method of producing

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357 20, 357 46, 357 92, H01L 2704, H03K 19091

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active

045996350

ABSTRACT:
An I.sup.2 L device is disclosed wherein the P type injector region of a PNP transistor is formed so as to be buried in an N.sup.- type epitaxial layer below the P type collector region of the PNP transistor, whereby the carrier injection efficiency of the transistor is improved and a high switching speed is obtained. The I.sup.2 L device further includes an inversed NPN transistor wherein the abovementioned P type collector region of the PNP transistor works as a base region of the NPN transistor, an N type collector region is formed in the P type base region, and the abovementioned P type injector region extends between the N.sup.- type epitaxial layer and an N.sup.+ type substrate except below the N type collector region so that the effective emitter portion of the NPN transistor is limited to a specific area immediately below the N type collector region, thereby to reduce the power consumption.

REFERENCES:
patent: 3581165 (1971-05-01), Seelbach et al.
patent: 3913123 (1975-10-01), Masaki et al.
patent: 4056810 (1977-11-01), Hart et al.

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