Semiconductor integrated circuit device and method for...

Electrical transmission or interconnection systems – Plural load circuit systems – Anticoupling of load circuits through same source

Reexamination Certificate

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Details

C307S147000, C257S202000, C257S503000, C257S909000, C327S565000

Reexamination Certificate

active

06657318

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor integrated circuit device comprising a semiconductor substrate and a plurality of circuit blocks each being provided on this substrate and having a power input terminal for receiving electric power supplied from a power supply terminal. Furthermore, the present invention relates to a method for mounting circuit blocks in this semiconductor integrated circuit device.
A one-chip microcomputer serving as a semiconductor integrated circuit device comprises a plurality of circuit blocks, such as CPU, ROM, RAM, and A/D converters. For example, CPU (i.e., central processing unit) comprises numerous transistors each repeating a switching operation in response to a clock signal. Accordingly, CPU is subjected to an increased amount of feedthrough current.
Furthermore, ROM (i.e., read only memory) and RAM (i.e., random access memory) comprise large-scale transistors serving as decoder buffers which also repeat the switching operation. Accordingly, ROM and RAM are subjected to an increased amount of feedthrough current.
The feedthrough current, caused in this manner in response to clock signals, induces fluctuation of electrical potential, referred to as “bounce”, at a power supply terminal or at a ground terminal. The produced bounce becomes a power noise which is propagated or transmitted to an external device via a power supply terminal of a microcomputer. As a result, a printed pattern of power supply wiring on a printed circuit board generates undesirable radiative noises resulting from the power noise of the microcomputer.
As the feedthrough current is pulsative, undesirable radiative noises spread in a wide frequency range. For example, on a printed circuit board, the radiative noises are widely produced in a frequency range from several 10 MHz to several 100 MHz. To eliminate such noises caused from a printed circuit board, a conventionally known method is to provide an external bypass capacitor connected to a power source terminal of a microcomputer. However, due to the parasitic inductance inherent to individual capacitors, the impedance of the bypass capacitor becomes large when the generated noise has a higher frequency. Thus, simply relying on an external bypass capacitor connected to the power source terminal of a microcomputer is not effective to suppress high-frequency noises.
SUMMARY OF THE INVENTION
In view of the foregoing problems of the prior art, the present invention has an object to provide a semiconductor integrated circuit device capable of suppressing power source noises in a wide frequency range, especially in higher frequencies. Furthermore, the present invention has an object to provide a method for mounting circuit blocks in this semiconductor integrated circuit device.
To accomplish the above and other related objects, the present invention provides a first semiconductor integrated circuit device comprising a semiconductor substrate mounting a plurality of circuit blocks to which electric power is supplied from a power supply terminal. Each of the plurality of circuit blocks has a power input terminal and a ground terminal. A plurality of bypass capacitors are provided for the plurality of circuit blocks, each bypass capacitor being disposed between the power input terminal and the ground terminal of a corresponding circuit block. According to the first semiconductor integrated circuit device, the order of the plurality of circuit blocks arrayed with respect to the power supply terminal is dependent on the noise level at power input terminals of respective circuit blocks, so that a circuit block having a lower noise level is located near the power supply terminal while a circuit block having a higher noise level is located far from the power supply terminal.
For example, when a microcomputer serves as a semiconductor integrated circuit device mounted on a printed circuit board. Like a conventional technique, adding an external bypass capacitor to the power supply terminal of a microcomputer makes it possible to reduce the power noise propagating along a power wiring pattern on the printed circuit board when such noise is generated in response to an operation of the microcomputer.
However, an actual equivalent circuit of the external bypass capacitor attached to a microcomputer includes not only a capacitance component but also an inductance component as well as a resistance component. Among these components, the inductance component becomes dominant in a high-frequency region and increases the impedance. As a result, relying only the external bypass capacitor is not effective to sufficiently absorb the power noise of the microcomputer.
Hence, according to the present invention, internal bypass capacitors are provided in a semiconductor integrated circuit in such a manner that an independent bypass capacitor is interposed between a power input terminal and a ground terminal of each circuit block in the semiconductor integrated circuit. This is effective to reduce the inductance component so that the increase of impedance can be effectively suppressed in the high-frequency region. As a result, the power noise can be sufficiently absorbed in respective circuit blocks. Furthermore, as the capacitance of each bypass capacitor can be optimized according to the operating condition of each circuit block, absorption of the power noise can be effectively performed.
Furthermore, according to the present invention, a plurality of circuit blocks are arrayed with respect to the power supply terminal in order of the noise level at the individual power input terminals, so that a circuit block having a lower noise level is located near the power supply terminal while a circuit block having a higher noise level is located far from the power supply terminal. According to this layout, the circuit block having the highest noise level has a largest wiring impedance when observed or measured from the power supply terminal.
For example, when LC represents an inductance component of a bypass capacitor interposed between a power input terminal and a ground terminal of a circuit block and LP represents an inductance of a wiring impedance existing between two power input terminals of two circuit blocks, the relationship LP>>LC is established. This makes it possible to allow the generated noise, when generated at a power input terminal, to circulate via a circulation path including the bypass capacitor and attenuate in this circuit block. As a result, propagation of the noise to a neighboring circuit block or to the power supply terminal of the semiconductor integrated circuit can be effectively prevented.
In the circuit block located furthest from the power supply terminal of the semiconductor integrated circuit, the wiring impedance may not be sufficient to obstruct the power noise and accordingly part of the power noise may propagate into a neighboring circuit block. However, in this case, the propagated power noise can be obstructed by a wiring impedance of the neighboring circuit block. The power noise circulates in a circulation path including a bypass capacitor and attenuates in this neighboring circuit block. Thus, further propagation of the noise to the power supply terminal can be surely prevented.
Accordingly, by locating a plurality of circuit blocks in this manner, the circulative attenuation of the power noise brought by the bypass capacitor can be enhanced. The present invention makes it possible to effectively suppress high-frequency components of the power noise and prevent the power noise from propagating via the power supply terminal to the outside of the semiconductor integrated circuit device. Thus, radiative noises of the printed circuit board can be reduced.
Locating the higher noise level circuit block far from the power supply terminal (or the ground terminal) in the semiconductor integrated circuit device makes it possible to reduce an element area of a required bypass capacitor. If this circuit block is located adjacent to the pad of power supply (or ground) terminal, it will

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