Semiconductor integrated circuit device and manufacturing method

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

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257211, H01L 2182, H01L 2708

Patent

active

051683423

ABSTRACT:
In a semiconductor integrated circuit device adopting a master slice system, a plurality of lattice points of an X-Y lattice-shaped channel region set by an automatic arrangement and routing system correspond to one input/output terminal of a prescribed basic cell (or logic circuit), thereby a plurality of signal wirings can be connected to the one input/output terminal.

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