Static information storage and retrieval – Addressing
Reexamination Certificate
2007-04-10
2007-04-10
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Addressing
C365S189070
Reexamination Certificate
active
10879297
ABSTRACT:
A semiconductor integrated circuit device includes a memory cell array, an address transition detecting circuit which detects transition of a column address signal, the column address signal being used to specify a column address of the memory cell array, a control circuit having a timeout circuit, the control circuit which generates an internal circuit control signal of desired length used to control column access to the memory cell array based on a result of detection by the address transition detecting circuit, and a column selection line whose selection time is controlled by the control circuit, wherein the column address signal used for selection of the column selection line is latched in a period of time in which the column selection line is selected at a write operation time.
REFERENCES:
patent: 5629896 (1997-05-01), McClure
patent: 6590829 (2003-07-01), Takeuchi
patent: 6834020 (2004-12-01), Takahashi et al.
patent: 2002/0126566 (2002-09-01), Takeuchi
patent: 2005/0068837 (2005-03-01), Takeuch et al.
patent: 2002-269977 (2002-09-01), None
Graham Kretelia
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Zarabian Amir
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