Semiconductor integrated circuit device and a method for manufac

Details Semiconductor integrated circuit device and a method for manufac Semiconductor integrated circuit device and a method for manufac

1990-12-21

1991-09-17

James, Andrew J.

357 43, 357 2312, 357 48, H01L 2702

Patent

active

050499670

ABSTRACT:
An improved arrangement is provided for forming a bipolar transistor on a substrate with CMOS elements. All of the transistors (i.e., the bipolar, P-MOS and N-MOS) are formed in regions having gradually decreasing impurity concentrations from a surface toward the substrate. In addition, a buried layer is provided under each of the regions of decreasing impurity concentration in which the transistors are formed. These buried layers have a significantly higher impurity concentration than the portion of the region of decreasing impurity concentration which they are respectively adjacent to. Using this arrangement, punch-through is prevented and excellent electrical operating characteristics are provided for both the bipolar transistors and the CMOS elements.

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patent: 4829201 (1989-05-01), Masuda et al.
Panills, L. C. et al., "Turn-Tub CMOS: A Technology for VLSI Circuits" IEDM 1980 752-755.

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