Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1996-07-16
1998-09-22
Nelms, David C.
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
36523003, 365222, G11C 800
Patent
active
058124810
ABSTRACT:
A semiconductor memory device includes a buffer for outputting an address signal and a decoding circuit having an input for receiving the address signal. A switch electrically connects the buffer to the input of the decoding circuit if a refresh mode specifying signal specifies a first data refresh mode, and electrically disconnects the buffer from the input of the decoding circuit if the refresh mode specifying signal specifies a second data refresh mode different from the first data refresh mode. An activating/deactivating circuit activates the input of the decoding circuit if the refresh mode specifying signal specifies the first data refresh mode and deactivates the input of the decoding circuit if the refresh mode specifying signal specifies the second data refresh mode.
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Numata Kenji
Ogihara Masaki
Ho Hoai
Kabushiki Kaisha Toshiba
Nelms David C.
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