Static information storage and retrieval – Addressing – Sync/clocking
Patent
1994-05-16
1995-08-01
Popek, Joseph A.
Static information storage and retrieval
Addressing
Sync/clocking
365208, 36518907, G11C 1134
Patent
active
054385512
ABSTRACT:
In a semiconductor integrated circuit device, a sense amplifier (30A) is capable of operating selectively with a first operating point (VR1) or with a second operating point (VR2) at the time of address change. A control circuit (80) detects the output data output at the preceding read cycle and causes the sense amplifier to operate with said first operating point in accordance with the output data of the preceding read cycle. A match detecting circuit (210) may be provided to generate a match signal or a mismatch signal depending on whether or not the input and output of a data input delay circuit (200) match each other. When the mismatch signal is generated, a transfer gate (220) is turned off and a latch circuit is made operative so that the write data of the preceding cycle is held on a write data line connected to the output of the transfer gate.
REFERENCES:
patent: 4922461 (1990-05-01), Hayakawa et al.
Manzo Edward D.
OKI Electric Industry Co., Ltd.
Popek Joseph A.
Ringsred Ted K.
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