Semiconductor integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays

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Details

257211, 257355, 257758, H01L 2710

Patent

active

060312572

ABSTRACT:
In a CMOS gate array, each of bonding pads corresponding to input cells for signals and bonding pads corresponding to input cells for supply voltages is formed of a plurality of conductor layers, whereas each of bonding pads (non-connected pads) corresponding to input/output cells not to be used is formed of, for example, the uppermost conductor layer. Thus, the bonding pad (non-connected pad) corresponding to the input/output cell not to be used becomes greater in the thickness of an underlying insulator film and longer in its spacing from a semiconductor substrate in comparison with each of the bonding pad for the signal and the bonding pad for the supply voltage.

REFERENCES:
patent: 5514892 (1996-05-01), Countryman et al.
patent: 5734200 (1998-03-01), Hsue et al.
patent: 5818086 (1998-10-01), Lin et al.
patent: 5869870 (1999-02-01), Lin

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