Semiconductor integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means

Reexamination Certificate

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Details

C257S210000, C257SE23151, C257SE27026, C326S041000

Reexamination Certificate

active

07456447

ABSTRACT:
In a semiconductor integrated circuit device, a VDD wiring trace and a GND wiring trace are routed along an N-well and a P-well, respectively, within a substrate. A substrate-bias VDD2 wiring trace is routed in a direction that intersects the VDD wiring trace and GND wiring trace in the same layer thereof and is electrically connected thereto. A P+ diffusion layer is disposed in the N-well in the vicinity of a portion where the wiring directions of the VDD wiring trace and substrate-bias VDD2 wiring trace intersect and is electrically connected to the VDD wiring trace via a contact. An N+ diffusion layer is disposed in the P-well in the vicinity of a portion where the wiring directions of the GND wiring trace and substrate-bias VDD2 wiring trace intersect and is electrically connected to the GND wiring trace via a contact. The P+ diffusion layer is used as a wiring route regarding the VDD wiring trace and the N+ diffusion layer is used as a wiring route regarding the GND wiring trace.

REFERENCES:
patent: 6489689 (2002-12-01), Nojiri
patent: 2001-148464 (2001-05-01), None

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