Semiconductor integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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Details

C257S528000, C257S532000, C438S210000, C438S329000

Reexamination Certificate

active

10688000

ABSTRACT:
The bottom side of an N type silicon substrate is connected to a power supply terminal, a second P type epitaxial layer is formed on all sides of the N type silicon substrate, and a device forming portion is provided on the second P type epitaxial layer. A first P type epitaxial layer and an interlayer insulating film are provided on the device forming portion and an N well and a P well are formed on the top surface of the first P type epitaxial layer. The second P type epitaxial layer is connected to a ground terminal via the first P type epitaxial layer, the P well, a p+diffusion region, a via and a wire. Accordingly, a pn junction is formed at the interface between the second P type epitaxial layer and the N type silicon substrate.

REFERENCES:
patent: 6259136 (2001-07-01), Kawaguchi et al.
patent: 6337824 (2002-01-01), Kono et al.
patent: 6541840 (2003-04-01), Terayama et al.
patent: 6768171 (2004-07-01), Disney
patent: 10-012825 (1998-01-01), None
patent: 2002-124636 (2002-04-01), None

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