Semiconductor integrated circuit device

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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Reexamination Certificate

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10913356

ABSTRACT:
An inventive semiconductor integrated circuit device includes: an external connection terminal; an electrostatic discharge protection circuit; an output circuit; an output prebuffer circuit; an input prebuffer circuit; an internal circuit; an inter-power supply electrostatic discharge protection circuit; and a substrate potential control circuit. The substrate potential control circuit includes a capacitor and a resistor. The inter-power supply electrostatic discharge protection circuit includes an NMIS transistor. When a positive surge is applied to the external connection terminal, the substrate potential of the NMIS transistor is also increased. Thus, the NMIS transistor is turned ON, and the positive electrical charge supplied to the external connection terminal is discharged toward a ground line.

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patent: 6369994 (2002-04-01), Voldman
patent: 6965503 (2005-11-01), Connor et al.
patent: 2002/0066929 (2002-06-01), Voldman
patent: 7-22617 (1995-01-01), None
patent: 2001-308200 (2001-11-01), None
patent: 2003-124328 (2003-04-01), None

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