Semiconductor integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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C257S510000, C257S513000, C257S063000, C257S064000, C257S065000

Reexamination Certificate

active

06847093

ABSTRACT:
A semiconductor integrated circuit device is formed by a semiconductor substrate having an SiGe layer and a first Si layer epitaxially grown thereover, and on which there are element formation regions each partitioned by element isolation regions; a shallow groove isolation, which has a groove formed in each of the element isolation regions and an insulating film inside of the groove, said groove penetrating through the first Si layer and having a bottom in the SiGe layer; a second Si layer formed between the shallow groove isolation and the SiGe layer; and a semiconductor element formed over the main surface of the semiconductor substrate in the element formation regions. This construction enables a reduction in leakage current via the walls of the shallow groove isolation of the strained substrate, thereby improving the element isolation properties.

REFERENCES:
patent: 6274894 (2001-08-01), Wieczorek et al.
patent: 6570217 (2003-05-01), Sato et al.
K. Rim, et al., “Strained Si NMOSFETs for High Performance CMOS Technology, 2001, Symposium on VLSI Technology digest of Technical Papers”, pp. 59-60.

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