Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means
Reexamination Certificate
2011-01-04
2011-01-04
Stark, Jarrett J (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular chip input/output means
C257S207000, C257S204000, C257SE27060, C257SE23141
Reexamination Certificate
active
07863652
ABSTRACT:
To provide a semiconductor integrated circuit device advantageous against EM and ESD. A plurality of I/O cells; a power wire formed of a plurality of interconnect layers over the above-described I/O cells; a bonding pad formed in an upper layer of the power wire and in a position corresponding to the I/O cell; and lead-out areas capable of electrically coupling the I/O cell to the bonding pad are provided. The above-described power wire includes a first power wire and a second power wire, and the above-described I/O cell includes first elements coupled to the first power wire and second elements coupled to the second power wire. The first element is placed on the first power wire side, and the second element is placed on the second power wire side. The first power wire and the second power wire can allow for a high current due to the interconnect layers over the I/O cells, thus having robustness against EM and ESD.
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Iwabuchi Masaru
Tanaka Kazuo
Toyoshima Shunsuke
Miles & Stockbridge P.C.
Renesas Electronics Corporation
Stark Jarrett J
Tynes, Jr. Lawrence
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