Textiles: cloth finishing
Reexamination Certificate
2000-03-28
2001-11-20
Elms, Richard (Department: 2824)
Textiles: cloth finishing
C365S194000
Reexamination Certificate
active
06318707
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor integrated circuit devices, and more particularly to a semiconductor integrated circuit device that operates in synchronism with an external clock signal applied thereto.
2. Description of the Related Art
Recently, semiconductor integrated circuit devices have been required to operate at higher frequencies. For example, memories are required to operate at higher speeds as CPU operates faster. For example, SDRAM (Synchronous Dynamic Random Access Memory) and DDR-SDRAM (Double Data Rate SDRAM) can operate at a high frequency in synchronism with an external clock signal applied therefrom. Such memories must be equipped with a high-speed, high-precision input circuit supplied with a clock signal and a data signal from the outside of the memories.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor integrated circuit device equipped with a high-speed, high-precision input circuit supplied with a clock signal and a data signal.
A more specific object of the present invention is to provide a semiconductor integrated circuit device capable of adjusting deviations of the timings of the clock signal and the data signals.
The above objects of the present invention are achieved by a semiconductor integrated circuit device comprising: a clock buffer circuit receiving a clock signal; a data buffer circuit receiving a data signal; an output circuit outputting the data signal from the data buffer circuit in accordance with the clock signal from the clock buffer circuit; and an adjustment circuit adjusting timings of the clock signal and the data signals. Since the timings of the clock signal and the data signals can be adjusted, it is possible to realize a high-speed, high-precision input circuit.
REFERENCES:
patent: 5768177 (1998-06-01), Sakuragi
patent: 5835444 (1998-11-01), Kim et al.
patent: 6055210 (2000-04-01), Setogawa
patent: 6111812 (2000-08-01), Gans et al.
patent: 6125064 (2000-09-01), Kim et al.
patent: 9-153279 (1997-06-01), None
patent: 10-21684 (1998-01-01), None
Hara Kota
Shinozaki Naoharu
Tomita Hiroyoshi
Arent Fox Kintner & Plotkin & Kahn, PLLC
Elms Richard
Fujitsu Limited
Phung Anh
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