Semiconductor integrated circuit device

Details Semiconductor integrated circuit device Semiconductor integrated circuit device

1999-09-23

2001-01-23

Cunningham, Terry D. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S091000, C327S336000

Reexamination Certificate

active

06177814

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a peak/bottom detection circuit for detecting the peak level or bottom level of a laser output, and more specifically, to a peak/bottom detection circuit used for controlling the laser output of an optical head for rewritable optical disks (CD-R, CD-RW, DVD-RAM).
FIG. 1
is a block diagram showing the structure of a conventional peak detection circuit, and
FIG. 2
is a diagram showing the waveform of its operation.
As shown in
FIG. 1
, an input signal SA is supplied to an input terminal
50
, and a peak hold signal SB is output from an output terminal
54
.
An operation amplifier
51
compares the input signal SA with the peak hold signal SB, and while the input signal SA is being higher than the peak hold signal SB (SA>SB), the output from the operation amplifier
51
is set at “H” level, and the diode
52
is turned on. The diode
52
supplies a charge current ICC to a hold capacitor
53
, so as to charge the hold capacitor
53
. The level of the peak hold signal SB increases as the hold capacitor
53
is charged as shown in FIG.
2
.
Further, when the level of the input signal SA is set to that of the peak hold signal SB or less (SA≦SB), the operation amplifier
51
sets its output to “L” level, and the diode
52
is turned off. Thus, the peak hold signal SB is set in a hold state as shown in FIG.
2
.
As the above-described operation is repeated sometimes, the peak hold signal SB is held at substantially the peak level of the input signal SA.
However, in the peak detection circuit shown in
FIG. 1
, the charge current ICC is not controlled, and therefore it is difficult to finish charging the hold capacitor
53
quickly. Therefore, as can be seen in
FIG. 2
, the peak hold signal SB, in some cases, exceeds very much the peak level of the input signal SA. This results in a detection error ERR, which greatly decreases the accuracy of the peak detection.
Further, in some other cases, the peak detection is stopped in the middle of its operation, and set in a hold state. In the circuit shown in
FIG. 1
, it is necessary to switch the input signal SA to the level of the peak hold signal SB or less, in order to execute such a control as just described. This control causes a complexity to the laser output control system or peak detection circuit, which leads to an increase in the product cost.
Further, when the input signal SA is switched, a switching noise is generated. If the peak detection circuit detects the switching noise, a highly accurate peak detection will become further difficult.
BRIEF SUMMARY OF THE INVENTION
The present invention has been proposed in consideration of the above described circumstances, and the main object thereof is to provide a semiconductor integrated circuit device having a peak/bottom detection circuit capable of detecting a peak or a bottom accurately at high speed.
Another object of the present invention is to provide a semiconductor integrated circuit device having a peak/bottom detection signal capable of pausing a peak or bottom detection operation while avoiding an increase in the detection accuracy.
In order to achieve the above-described main object, there is provided according to the present invention, a semiconductor integrated circuit device including a peak/bottom detection circuit having: a capacitor; a current source for charging or discharging the capacitor; a switch for connecting the current source to the capacitor; a comparator for comparing a potential of a connection node between the switch and the capacitor, and a potential of an input signal with each other, and for turning the switch on/off in accordance with a result of the comparison; a buffer for buffering the potential of the connection node between the switch and the capacitor, and outputting an output signal; and a damper for damping the current source on the basis of a result of comparison between a potential of the output signal and a potential of the input signal.
The semiconductor integrated circuit device having the above-described structure includes the damper for damping the current source on the basis of the results of the comparison between the output signal and the input signal. With this structure, it becomes possible to control the charge (discharge) current to the capacitor, which is not conventionally controlled, on the basis of the comparison between the output signal and the input signal. For example, the charge current can be reduced as the difference between the input signal and the output signal becomes smaller.
When the charge current is reduced as the difference between the input signal and the output signal becomes smaller as described above, the charge on the capacitor can be finished at more accurate timing and more quickly than the conventional case where the charge current is not controlled. Therefore, it becomes difficult to cause such a phenomenon that the output signal exceeds the peak level of the input signal, and therefore the accuracy of the peak detection is markedly improved.
Further, in order to achieve the other object of the present invention, a control stage for controlling an output of the comparator and turning off the switch regardless of the result of the comparison of the comparator is further provided.
The semiconductor integrated circuit device having the above-described structure turns off the switch by controlling the output of the comparator. Therefore, the peak or bottom detection can be stopped without controlling the input signal.
As described above, the peak or bottom detection can be stopped without controlling the input signal, and therefore a switch noise is not generated to the input signal when stopping the detection. In this manner, it becomes possible to stop the peak or bottom detection while avoiding the decrease in the detection accuracy.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.


REFERENCES:
patent: 4686432 (1987-08-01), Berland et al.
patent: 5025176 (1991-06-01), Takeno
patent: 5250796 (1993-10-01), Taguchi et al.
patent: 5394020 (1995-02-01), Nienaber
patent: 5471169 (1995-11-01), Dendiger
patent: 6-103591 (1994-04-01), None

Affiliated with

Also associated with

Rating

Semiconductor integrated circuit device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor integrated circuit device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2476704