Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Non-single crystal – or recrystallized – material forms active...
Patent
1995-06-06
1997-07-08
Saadat, Mahshid D.
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Non-single crystal, or recrystallized, material forms active...
257 51, 257903, H01L 2904, H01L 31036
Patent
active
056464231
ABSTRACT:
A memory cell of the type a pair of cross-coupled CMOS inverters of a SRAM is disclosed in which the load MISFETs are stacked above the semiconductor substrate and over the drive MISFETS. Each load MISFET of a memory cell consists of a source, drain and channel region formed within the same polycrystalline silicon film, and a gate electrode consisting of a different layer conductive film than that of the drive MISFETs. In a memory cell having such a stacked arrangement, the source (drain) region and gate electrode of each load MISFET thereof are patterned to have an overlapping relationship with each other so as to increase the effective capacitance associated with each of the memory cell storage nodes. The gate electrodes of both the drive and load MISFETs are formed of n-type and p-type polycrystalline silicon films, respectively, and the drain regions of the first and second p-channel load MISFETs are electrically connected to the drain regions of the first and second n-channel drive MISFETs through separate polycrystalline silicon films, respectively. The polycrystalline silicon gate electrodes of the first and second load MISFETs are respectively electrically connected to the drain regions of the second and first drive MISFETs in each memory cell of the SRAM, furthermore.
REFERENCES:
patent: 4399450 (1983-08-01), Lohstroh
patent: 5478711 (1995-12-01), Chan et al.
Hashimoto Naotaka
Hashimoto Takashi
Honjou Shigeru
Kaga Toru
Koike Atsuyoshi
Clark S. V.
Hitachi , Ltd.
Saadat Mahshid D.
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