Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1991-08-12
1993-07-13
LaRoche, Eugene R.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
3072722, 307443, 377 79, 377117, G11C 700
Patent
active
052276740
ABSTRACT:
A flip-flop circuit includes a data input terminal, a data output terminal, a memory circuit and a bypass circuit having a shorter delay time than that of the memory circuit. The memory circuit and the bypass circuit are connected in parallel between the data input terminal and the data output terminal so that the data are outputted to the data output terminal through the bypass circuit when the data are written in the memory circuit. As a result, the delay time of the flip-flop circuit is shortened.
REFERENCES:
patent: 3917961 (1975-11-01), Reed
patent: 4409680 (1983-10-01), Schnathorst et al.
patent: 4970407 (1990-11-01), Patchen
patent: 5023475 (1991-06-01), Ducourant
patent: 5028814 (1991-07-01), Sung et al.
patent: 5049760 (1991-09-01), Ooms
patent: 5095225 (1992-03-01), Usui
"Second-generation floating-point arithmetic coprocessor with a 32-bit bus" Nikkei Electronics, Jul. 13, 1987, No. 425, Nikkei McGraw-Hill, pp. 123-138.
Koide Kazuo
Ohkawa Masaaki
Takahashi Toshiro
Hitachi , Ltd.
LaRoche Eugene R.
Yoo Do Hyun
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