Semiconductor integrated circuit device

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34082587, 34082591, 34082583, H03K 19173, H04Q 900

Patent

active

046316868

ABSTRACT:
A programmable semiconductor integrated circuit device is disclosed, which includes different kinds of MSI scale function blocks formed on a substrate. First wiring lines extending in a row direction are connected to input terminals of the function blocks, respectively. Second wiring lines are connected to output terminals of the function blocks, respectively. The second wirings are T-shaped and have respective line components extending in a column direction, with the first wiring lines. Floating gate type field effect transistors are provided, in a matrix manner, at mutually electrically insulated crossing points among the first and second lines. The electrical state of the switching transistors can be set independently and changeably, under the control of row and column decoders, to specify a desired wiring pattern of the function blocks by having the shortest signal transmission paths of the first and second wiring lines through the hardware as in the case of a custom LSI, thereby realizing the desired custom-made LSI.

REFERENCES:
patent: 3818452 (1974-06-01), Greer
patent: 4091359 (1978-05-01), Rossler
patent: 4447881 (1984-05-01), Brantingham et al.
patent: 4523106 (1985-06-01), Tanizawa et al.
IBM Journal of Research & Development, vol. 19, No. 2, (Mar. 1975), H. Fleisher et al., "An Introduction to Array Logic", p. 98.
IEEE Transactions of Electron Devices, vol. ED-29, No. 4, (Apr. 1982), K. F. Smith et al., "Structured Logic Design of Integrated Circuits Using the Storage/Logic Array (SLA)," p. 765.
S. Muroga, "VLSI System Design", 1982, John Wiley & Sons, Inc., chapter 9, pp. 355-427.
IBM Technical Disclosure Bulletin, vol. 25, No. 3B, Aug. 1982; T. A. Larsen, "Circuit for Setting an Electronically Alterable FET in an Array for Controlling a Generalized Logic Circuit", pp. 1524, 1525.

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