Semiconductor integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

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Details

257209, 257296, H01L 2900, H01L 2710, H01L 27108

Patent

active

059863200

ABSTRACT:
A method of testing a semiconductor integrated circuit device including a defective chip recognition circuit unit so that in testing a DPAM unit, if the DRAM unit cannot be made to conform to a specification, even using a redundancy circuit, defective data can be written in the defective chip recognition circuit unit. The method includes deciding whether a DRAM unit conforms and deciding whether a DRAM unit judged imperfect can be conformed using a redundancy circuit; deciding whether the semiconductor integrated circuit device is defective when the DRAM unit has been judged defective and writing the defective decision data into a defective chip recognition circuit unit; reading the defective decision data in the defective chip recognition circuit unit and deciding whether to test the logic unit; testing the logic unit when the test of the logic unit is to be performed; and deciding whether the logic unit conforms.

REFERENCES:
patent: 5373476 (1994-12-01), Jeon
patent: 5870329 (1999-02-01), Foss

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