Boots – shoes – and leggings
Patent
1997-09-08
1999-12-14
Gordon, Paul P.
Boots, shoes, and leggings
700 95, 700 97, 700117, 327 27, 327 33, 327121, 326540, 326545, 326546, G06F 1900, G06G 766
Patent
active
060008296
ABSTRACT:
In a semiconductor integrated circuit, a CMOS logic circuit receives a voltage from a power-source line, while releasing a current through a ground line. A constant-voltage auxiliary circuit is disposed in parallel with the CMOS logic circuit. The constant-voltage auxiliary circuit receives an output signal from the CMOS logic circuit. The constant-voltage auxiliary circuit consumes power when the output signal from the CMOS logic circuit is stable to maintain a potential difference between the power-source line and the ground line at a specified voltage and halts power consumption when the output signal from the CMOS logic circuit is inverted, i.e., when the potential difference is decreasing, thereby suppressing the decrease of the potential difference. Accordingly, voltage fluctuations on the power-source line are suppressed.
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Fukumoto Minako
Koshita Noriko
Kurokawa Keiichi
Takahashi Miwaka
Toyonaga Masahiko
Gordon Paul P.
Matsushita Electric - Industrial Co., Ltd.
Patel Ramesh
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