Excavating
Patent
1987-06-12
1989-08-08
Fleming, Michael R.
Excavating
365201, 371 25, G01R 3128
Patent
active
048560022
ABSTRACT:
A test circuit of a semiconductor integrated circuit apparatus comprising a latch circuit connected to an output terminal of a scan register for holding output data of the scan register stored before scanning in a scan mode during the test operation.
REFERENCES:
patent: 4701921 (1987-10-01), Powell
patent: 4701922 (1987-10-01), Kuboki
patent: 4710931 (1987-12-01), Bellay
patent: 4710933 (1987-12-01), Powell
patent: 4718065 (1988-01-01), Boyle
patent: 4745355 (1988-05-01), Eichelberger
Arakawa Takahiko
Hanibuchi Toshiaki
Kishida Satoru
Sakashita Kazuhiro
Tomioka Ichiro
Fleming Michael R.
Mitsubishi Denki & Kabushiki Kaisha
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