Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2000-01-06
2001-10-02
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C307S052000, C375S220000
Reexamination Certificate
active
06297675
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an improved semiconductor integrated circuit that can transmit data at high speeds with reduced power dissipation and also relates to a system including such a circuit.
Present-day semiconductor integrated circuits (like an IEEE 1394 physical layer LSI) are specially designed to transmit data from unit to unit at high speeds to implement a system that can process a tremendously large quantity of data as fast as possible to cope with multimedia applications, in particular. As a result of recent vigorous research and development, the state-of-the-art semiconductor integrated circuits can normally transmit data at as high a rate as 200 megabits per second (Mbps). Some integrated circuits have already doubled the transmission rate although those circuits are just samples up to now. Furthermore, an extremely-high-speed data transmission technique exceeding 1 gigabits per second (Gbps) has also been realized albeit experimentally.
In the IEEE 1394 physical LSI, data is sent as direct current from the transmitting end through a differential twisted pair of cables. A resistor is connected between the twisted pair, and a potential difference between the twisted pair, which is variable with the current flowing through the resistor, will be supplied to the receiving end. The IEEE 1394 physical layer LSI also adopts a data transmission technique termed “DS-Link”. Specifically, in transmitting data, a pair of data lines and a pair of strobe lines are associated with each single port. The specifications of the IEEE 1394 standards are described in Draft Standard Vex. 8.4.
According to the IEEE 1394 physical layer LSI technology, however, a considerable amount of current is always consumed at the output ports because the direct current is output through the twisted pair. Particularly when an integrated circuit is provided with an increased number of output ports, the increase in current dissipation poses a serious problem. Moreover, although data is supposed to change its level on either the data line or strobe line pair in accordance with the DS-Link technique, the direct current is always flowing through the pair with no data transitions, thus also increasing the amount of currents consumed.
SUMMARY OF THE INVENTION
An object of the present invention is providing (1) a semiconductor integrated circuit optimized to reduce the amount of current dissipated in transmitting data at high speeds as in the IEEE 1394 physical layer LSI, and (2) a system including such a circuit.
To achieve this object, when data is transmitted through multiple data bus pairs like the pairs of data and strobe lines, one of the data bus pairs is selectively driven with a current supplied. And then the current that has flowed through the selected pair is used again according to the present invention to drive the other data bus pair.
A semiconductor integrated circuit system according to the present invention includes first and second chips and a plurality of complementary data buses. Each of the buses is terminated with a resistor. The system exchanges data between the first and second chips through the complementary data buses. The inventive system further includes: a driver with a current drive capability, which drives the complementary data buses with a current supplied thereto; and means for selecting a changeable current path between power supply and ground through the complementary data buses.
In one embodiment of the present invention, each said complementary data bus consists of a pair of data lines. One of the data lines makes the current flow from the first to the second chip, while the other data line makes the current flow from the second to the first chip.
In another embodiment of the present invention, the system further includes an input circuit for receiving potential differences at the respective terminal resistors of the complementary data buses. The input circuit covers a wide range including all center potentials of the potential differences at the respective terminal resistors of the complementary data buses.
In still another embodiment, center potentials of potential differences at the respective terminal resistors of the complementary data buses are biased toward a supply or ground potential as a whole.
A semiconductor integrated circuit according to the present invention is connected to multiple data bus pairs, each of which is terminated with a resistor. The circuit includes means for selecting a changeable current path between first and second power supplies through the data bus pairs. The changeable path selecting means includes: a first current source connected to the first power supply; a second current source connected to the second power supply; first and second switching devices, which are connected to the first current source and selectively supply current to one of the data bus pairs; third and fourth switching devices, which are connected to the second current source and selectively extract the current from another one of the data bus pairs; and a fifth switching device for interconnecting the data bus pairs together.
In one embodiment of the present invention, the changeable path selecting means further includes a controller for controlling the first through fifth switching devices. The controller is integrated together with the first through fifth switching devices on the same chip.
Another semiconductor integrated circuit according to the present invention is also connected to multiple data bus pairs, each of which is terminated with a resistor. The circuit includes means for selecting a changeable current path between first and second power supplies through the data bus pairs. The changeable path selecting means includes: a first current source, which is connected to the first power supply and supplies current to one of the data bus pairs; a second current source, which is connected to the second power supply and extracts the current from another one of the data bus pairs; and first, second, third and fourth switching devices connecting an associated pair of data lines between two adjacent ones of the data bus pairs.
In one embodiment of the present invention, the changeable path selecting means further includes a controller for controlling the first and second switching devices. The controller is integrated together with the first and second switching devices on the same chip.
In another embodiment of the present invention, the circuit further includes virtually enabling circuits associated with the respective data bus pairs. Each said virtually enabling circuit gets associated one of the data bus pairs virtually enabled just like the other data bus pairs even while no data is transmitted through the data bus pair.
According to the present invention, when data is transmitted through multiple data bus pairs that are driven with a supplied current as in IEEE 1394 high-speed data transmission, current that has been supplied to drive one of the data bus pairs is used to drive another. As a result, the data can be transmitted at high speeds with reduced current dissipation.
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Prepared by the High Performance Serial Bus Working Group of the Microprocessor and Microcomputer Standards Committee, “P1394 Standard for a High Performance Serial Bus”, IEEE Standards Draft 8.0v4, pp 1-2, Nov. 21, 1995.
Akamatsu Hironori
Arima Yukio
Hirata Takashi
Komatsu Yoshihide
Takahashi Satoshi
Callahan Timothy P.
Matsushita Electric - Industrial Co., Ltd.
McDermott & Will & Emery
Nguyen Hai L.
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