Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2006-05-09
2006-05-09
Phan, Trong (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S185080
Reexamination Certificate
active
07042764
ABSTRACT:
A semiconductor integrated circuit device is provided on a semiconductor substrate, and includes a plurality of word lines, a plurality of data lines, and a plurality of electrically programmable and erasable non-volatile memory cells respectively coupled to the plurality of word lines and to the plurality of data lines. The erasable non-volatile memory cell each includes a MIS transistor having a floating gate having a first level polycrystalline silicon layer, a source, and a drain coupled to the corresponding data line, and a control gate formed of a semiconductor region in the semiconductor substrate, the control gate being coupled to the corresponding word line.
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Komori Kazuhiro
Kubota Katsuhiko
Okuyama Kousuke
Shukuri Shoji
Antonelli, Terry Stout and Kraus, LLP.
Phan Trong
Renesas Technology Corp.
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