Semiconductor integrated circuit and method of controlling...

Details Semiconductor integrated circuit and method of controlling... Semiconductor integrated circuit and method of controlling...

2008-12-11

2010-10-05

Cox, Cassandra (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000

Reexamination Certificate

active

07808290

ABSTRACT:
A semiconductor integrated circuit includes a delay locked loop (DLL) control block configured to generate a buffer enable signal, the buffer enable signal being a pulse signal that is periodically enabled when a smart power down signal is enabled, and a DLL circuit configured to control a phase of an external clock signal in response to the buffer enable signal to generate an output clock signal.

REFERENCES:
patent: 7528639 (2009-05-01), Choi
patent: 7676686 (2010-03-01), Ku et al.
patent: 2005/0093599 (2005-05-01), Kwak
patent: 2008/0136476 (2008-06-01), Ku
patent: 2007-095267 (2007-04-01), None
patent: 2007-295592 (2007-11-01), None
patent: 1020070035943 (2007-04-01), None
patent: 1020070036547 (2007-04-01), None
patent: 1020070036561 (2007-04-01), None
patent: 1020070036562 (2007-04-01), None

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