Semiconductor integrated circuit and method for testing...

Details Semiconductor integrated circuit and method for testing... Semiconductor integrated circuit and method for testing...

2011-03-22

2011-03-22

Moise, Emmanuel L (Department: 2437)

Information security

Protection of hardware

C713S001000, C713S002000, C380S002000

Reexamination Certificate

active

07913316

ABSTRACT:
A check computation circuit executes a computation corresponding to a computation for generating confidential CRC data, with respect to confidential data read from a non-volatile device. A comparison circuit compares the result of the computation in the check computation circuit with confidential CRC data read from the non-volatile device. When the result of the comparison indicates a mismatch, i.e., an error is detected, an encryption circuit encrypts the confidential data and the confidential CRC data using a secret key registered in a secret key register, and outputs the encrypted confidential data and confidential CRC data to the outside of a semiconductor integrated circuit.

REFERENCES:
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patent: 6607136 (2003-08-01), Atsmon et al.
patent: 7184545 (2007-02-01), Fujiwara
patent: 11-016392 (1999-01-01), None
patent: 2001-344992 (2001-12-01), None
patent: 2003-303500 (2003-10-01), None
Japanese Notice of Reasons for Rejection, w/ English translation thereof, issued in Japanese Patent Application No. JP 2006-033742 dated Mar. 16, 2010.
Japanese Office Action, with English translation, issued in Japanese Patent Application No. 2006-033742, mailed Jun. 8, 2010.

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