Semiconductor integrated circuit and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C257S177000, C257S784000, C257SE23024, C257SE21476, C438S612000

Reexamination Certificate

active

07667316

ABSTRACT:
A semiconductor integrated circuit includes a power transistor formed on a semiconductor substrate, a plurality of first metal patterns and a plurality of second metal patterns which are formed right above the power transistor and function as a first electrode and as a second electrode of the power transistor, respectively, a plurality of first buses each electrically connected with, of a plurality of first metal patterns, a corresponding first metal pattern, a plurality of second buses each electrically connected with, of a plurality of second metal patterns, a corresponding second metal pattern, wherein one contact pad is provided to each of a plurality of first buses and a plurality of second buses.

REFERENCES:
patent: 2002/0011674 (2002-01-01), Efland et al.
patent: 2974022 (1999-09-01), None
patent: 2000-114309 (2000-04-01), None
patent: 2004-363340 (2004-12-01), None
patent: 3725527 (2005-09-01), None
U.S. Appl. No. 11/945,605, filed Nov. 27, 2007, Fukamizu et al.
U.S. Appl. No. 11/946,282, filed Nov. 28, 2007, Fukamizu et al.
U.S. Appl. No. 12/038,060, filed Feb. 27, 2008.

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