Semiconductor integrated circuit and manufacturing method

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Clock or pulse waveform generating

Reexamination Certificate

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C327S293000

Reexamination Certificate

active

07071754

ABSTRACT:
In order to provide a semiconductor integrated circuit equipped with a clock distribution circuit that enables clock skew to be reduced without requiring great effort and without being affected by temperature variations or voltage variations, and a manufacturing method thereof, in a clock distribution circuit1installed in a semiconductor integrated circuit, part of the distribution path of a clock signal that passes from a first selector11of a first circuit block10that has many buffer stages via a first buffer stage10A is used, and a distribution path of a clock signal to a second buffer stage20A of a second circuit block20that has few buffer stages is constructed.

REFERENCES:
patent: 6429714 (2002-08-01), Schultz
patent: 6538489 (2003-03-01), Nakano
patent: 09-269847 (1997-10-01), None
patent: 11-214517 (1999-08-01), None
patent: 2001-285055 (2001-10-01), None

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