Semiconductor integrated circuit and its manufacturing method

Details Semiconductor integrated circuit and its manufacturing method Semiconductor integrated circuit and its manufacturing method

2000-05-22

2001-12-04

Tsai, Jey (Department: 2812)

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

C438S240000

Reexamination Certificate

active

06326218

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to a semiconductor integrated circuit having a ferroelectric (high dielectric) capacitor and a manufacturing method of the integrated circuit. In particular, the present invention relates to technique which is effective when adapted to a process for forming a conductive material, which constitutes a lower electrode of the capacitor, at a high aspect ratio or with high anisotropy.
Described in Japanese Patent Application Laid-Open No. Hei 10-98162 (Yunogami, et al.) is technique for patterning a thin film such as Pt film by dry etching through a resist mask with a view to forming a minute pattern at high dimensional accuracy without leaving a low vapor-pressure reaction product on the side surface of the pattern, wherein the dry etching is carried out using, as a mask, a photo resist of a predetermined pattern having, at at least the lower half portion thereof, a perpendicular side surface and a forward taper or roundness at the outer periphery of the head portion so as to form, on the side surface of the thin-film pattern, a forward taper reaching the lower end of the thin film.
Described in Japanese Patent Application Laid-Open No. Hei 8-153707 (Tokashiki) is technique of selectively dry etching an electrode containing ruthenium or ruthenium oxide and then treating the surface of the electrode with oxygen, ozone, water vapor or nitrogen oxide gas, with a view to removing the contamination of carbon or halogen which has appeared, during the formation of a minute pattern of platinum or conductive oxide, on its surface and at the same time, making the surface condition of the electrode similar or almost similar to that upon formation of the electrode material.
Disclosed in Japanese Patent Application Laid-Open No. Hei 9-266200 (Nakagawa, et al.) with a view to facilitating minute processing of a ferroelectric substance or platinum is the following technique. Described specifically, a laminate film of a lower platinum film, a ferroelectric film and an upper platinum film is formed over a device insulating film on a semiconductor substrate, followed by the formation of a titanium film having a film thickness not greater than one-tenth of the laminate film. After patterning the titanium film through a photo resist film, the laminate film is etched with the patterned titanium film by using a gas mixture of oxygen and chlorine having an oxygen concentration of 40%. Then the titanium film is removed by etching with a chlorine gas.
SUMMARY OF THE INVENTION
Since the development of a large-capacity DRAM (Dynamic Random Access Memory) of 1 Gbit or greater, it has been investigated, as a countermeasure against a reduction in the accumulated charge amount due to the miniaturization of a memory cell, to constitute the capacitive insulating film of an information storage capacitative element (capacitor) from a high dielectric material such as Ta
2
O
5
having a specific dielectric constant of about 20 and a non-perovskite structure or BST((Ba,Sr)TiO
3
) having a specific dielectric constant of at least 100 and being an ABO
3
type double oxide, that is, a perovskite type double oxide, or a ferroelectric material, which contains a perovskite or the like crystal structure, such as PZT(PbZr
x
Ti
1−x
O
3
), PLT(PbLa
x
Ti
1−x
O
3
), PLZT, PbTiO
3
, SrTiO
3
, or BaTiO
3
. In the field of a nonvolatile memory, on the other hand, a ferroelectric memory making use of the polarization and inversion of the above-exemplified ferroelectric material for the maintenance of memory is under development.
When the capacitative insulating film of a capacitor is made of a ferroelectric material as exemplified above or when a ferroelectric material as exemplified above is employed for the polarization and inversion film of a nonvolatile memory, it is necessary, as described in the above-described literature, to constitute conductive films for an electrode, between which the ferroelectric material film is sandwiched, of a material having high affinity with it such as a metal mainly made of a platinum group element (ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir) or platinum (Pt)) or an oxide thereof.
In general, the platinum group metal or oxide thereof cannot be etched easily with good anisotropy and in addition, short-circuiting failure presumably occurs owing to the etching residue. For example, formation of a capacitor using Pt is accompanied with the problem that a large amount of a low vapor-pressure reaction product sticks to the side surface of the pattern upon dry etching of a thin Pt film deposited on a substrate and it becomes a cause for the short circuit between capacitors. The existence of such a reaction product sticking to the side surface of the pattern also becomes a cause for deteriorating the anisotropy of the pattern.
According to the investigation of the present inventors, the use of a high dielectric BST as a capacitative insulating film for the capacitor of a 1 Gbit DRAM requires a lower electrode having the minimum width of 0.13 &mgr;m and a height of 0.45 &mgr;m, and also requires a space of 0.13 &mgr;m between the adjacent lower electrodes. A taper angle not less than 80 degree, preferably not less than 85 degree is necessary for forming such a minute pattern while imparting it with high reliability in durability to practical use. The term “taper angle” as used herein means an angle formed by the side wall of a lower electrode and the surface of an underlying material.
FIG. 34
is a schematic cross-sectional view illustrating the relation between a taper angle and the shape of a minute pattern. As illustrated in FIG.
34
(
a
), a taper angle of 90 degree is ideal. Supposing that the width of the bottom surface of the pattern is 0.13 &mgr;m and the height of the pattern is 0.45 &mgr;m, this pattern height cannot be actualized in the case where the taper angle is 80 degree (FIG.
34
(
f
)) but can be actualized in the case where the taper angle is 82 degree (FIG.
34
(
e
)). In the latter case, however, an area on the upper surface of the pattern is not available. At the taper angle of 85 degree (FIG.
34
(
d
)), a certain extent of an area can be held on the upper surface of the pattern and at the taper angle of 87 degree (FIG.
34
(
c
)), a sufficient area can be held on the upper surface of the pattern. The shape of the minute pattern is ideal when the taper angle is 89 degree (FIG.
34
(
b
)).
As a result of the investigation on etching technique of a platinum group metal such as ruthenium or an oxide thereof with a titanium nitride film or the like as a mask by using a chlorine-containing oxygen plasma, the present inventors developed technique, which is not known yet, for actualizing a substantially ideal cross-sectional shape having a taper angle of 89 degree by largely increasing the flow rate of an etching gas and carrying out over etching;
Even if the cross-sectional shape just after etching is almost ideal, however, the removing treatment of the titanium nitride film or the like, which serves as a mask, blunts the etching shape, more specifically, the taper angle, thereby causing a problem such as the narrowing of the pattern. The mask removing treatment causes another problem that it roughens the surface of a platinum group metal or oxide thereof, which is to serve as a lower electrode, thereby deteriorating the adhesion of a capacitive insulating film. By the etching treatment upon removal of the mask, the underlying insulating film adjacent to the bottom part of the pillar-shaped lower electrode is etched. The occurrence of such undesirable etching heightens the difficulty in the step coverage of the capacitive insulating film and is not preferred from the viewpoint of forming a highly reliable capacitive insulating film.
An object of the present invention is to actualize minute etching of ruthenium or ruthenium oxide having high affinity with a ferroelectric film such as BST.
Another object of the present invention is to prevent the narrowing of the pattern, roughening of the upper surfac

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