Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1999-01-06
2000-10-03
Picardat, Kevin M.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
438106, 438121, 438612, H01L 2144, H01L 2148, H01L 2150
Patent
active
061272078
ABSTRACT:
A semiconductor integrated circuit and a fabrication method therefor has the configuration that the number of pad driver cells 21 to 23 are equal to or more than the number of input/output control circuits 11 to 13, poly-silicon wirings 111 to 113 are connected to an input terminal IN and output terminals CP and CN in each of the input/output control circuit 11 to 13 in a wiring region LIN and poly-silicon wirings 211 to 233 are connected to input terminals CP and CN and an output terminal-IN of each of the pad driver cells 21 to 23 in the wiring region, and the poly-silicon wirings 111 to 133 are connected to poly-silicon wirings 211 to 233 through aluminum wirings.
REFERENCES:
patent: 5455460 (1995-10-01), Hongo et al.
patent: 5512765 (1996-04-01), Gaverick
patent: 5650357 (1997-07-01), Dobkin et al.
patent: 5744379 (1998-04-01), Mandai et al.
patent: 5780772 (1998-07-01), Singh et al.
Collins D. M.
Mitsubishi Denki & Kabushiki Kaisha
Picardat Kevin M.
LandOfFree
Semiconductor integrated circuit and fabrication method therefor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor integrated circuit and fabrication method therefor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor integrated circuit and fabrication method therefor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-194545