Semiconductor integrated circuit and design method for...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing

Reexamination Certificate

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Details

C716S139000, C326S040000, C326S041000, C326S046000, C326S047000

Reexamination Certificate

active

07992118

ABSTRACT:
The semiconductor integrated circuit of the invention includes: two first power supply lines placed in parallel in a same interconnect layer; a second power supply line placed between the two first power supply lines in the same interconnect layer; an actual operation flipflop connected to one of the two first power supply lines and the second power supply line and having a first clock terminal; and a dummy flipflop connected to the other first power supply line and the second power supply line and having a second clock terminal. The dummy flipflop includes: a contact connected to the other first power supply line or the second power supply line; and an interconnect for connecting the second clock terminal with the contact.

REFERENCES:
patent: 5959905 (1999-09-01), Payne
patent: 7383523 (2008-06-01), Inoue
patent: 2004/0027863 (2004-02-01), Lee et al.
patent: 2006/0181307 (2006-08-01), Shibayashi et al.
patent: 2007/0157151 (2007-07-01), Kim
patent: 2008/0141207 (2008-06-01), Nakamura
patent: 2008/0237644 (2008-10-01), Tripathi
patent: 2008/0283872 (2008-11-01), Kubo et al.
patent: 2005-322694 (2005-11-01), None

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