Semiconductor integrated circuit and consumed power reducing met

Details Semiconductor integrated circuit and consumed power reducing met Semiconductor integrated circuit and consumed power reducing met

1996-12-24

1999-12-21

Le, Dinh T.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327544, 327 63, 327199, H03K 104, G06F 108

Patent

active

060054220

ABSTRACT:
A semiconductor integrated circuit and a method for reducing the consumed power are provided. A comparator outputs bits having the same level, which correspond to each other, of a last input stored in a register and a current input that acts as an input signal. A zero counter counts the number of the bits having the same level output from the comparator. If the number of the bits having the same level is smaller than a predetermined number, the current input is not similar to the last input. Consequently, an instruction is given to a flip-flop to invert the current input. The inverted current input becomes similar to the last input. Thus, the consumed power of a logic can be reduced.

REFERENCES:
IEEE 1994 Custom Integrated Circuits Conference, pp. 259-266, 1994, Anantha P. Chandrakasan, et al., "Design of Portable Systems".

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