Semiconductor integrated circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device

Reexamination Certificate

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Details

C257S202000, C257S204000, C257S207000, C257S390000, C257S401000, C257S909000, C257S919000, C257SE27108

Reexamination Certificate

active

08039874

ABSTRACT:
According to an aspect of the present invention, there is provided a semiconductor IC that includes a plurality of standard cells arranged in a first direction on a semiconductor substrate, and a first diffusion layer connected to a first power source and a second diffusion layer connected to a second power source in the each standard cell, wherein the first diffusion layers as well as the second diffusion layers of neighboring standard cells are integrally formed.

REFERENCES:
patent: 4570176 (1986-02-01), Kolwicz
patent: 5777941 (1998-07-01), Pascucci
patent: 2005/0205894 (2005-09-01), Sumikawa et al.
patent: 9-289251 (1997-11-01), None
patent: 2005-229061 (2005-08-01), None
English Translation of JP09289251A (P1996-100926).
English Language Translation of JP2005-229061A (P2004-038795).
V. Chan et al., “Strain for CMOS Performance Improvement,” IEEE 2005 Custom Integrated Circuits Conference, pp. 667-674.

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