Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control
Reexamination Certificate
2008-12-17
2010-12-28
Chang, Joseph (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Particular error voltage control
C331S00100A
Reexamination Certificate
active
07859345
ABSTRACT:
The semiconductor integrated circuit incorporates a PLL circuit including a phase-frequency comparator1, first and second charge pumps2and3, a loop filter4, a voltage-control oscillator5and a divider6. The operation mode of the PLL circuit includes a standby state where locking is stopped, a lock response operation where locking is started and a steady lock operation where the locking started by the lock response operation is continued. In the steady lock operation, setting is made so that the second charge pump3is smaller in charge/discharge current than the first charge pump2. The first and second charge pumps2and3charge and discharge the loop filter4in response to outputs of the phase-frequency comparator1in reverse to each other in phase. In the lock response operation where locking is started, the second charge pump3is stopped from charging and discharging in reverse in phase.
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Wei-Ta Chen et al., “A Spread Spectrum Clock Generator for SATA-II”, 2005 IEEE International Symposium Circuits and Systems, May 23-26, 2005, pp. 2643-2646.
Chang Joseph
Miles & Stockbridge P.C.
Renesas Electronics Corporation
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