Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2007-10-15

2010-12-07

Kim, Kevin Y (Department: 2611)

Pulse or digital communications

Testing

Phase error or phase jitter

C375S371000

Reexamination Certificate

active

07848399

ABSTRACT:
A semiconductor integrated circuit has first and second delay circuits that have n (n is an integer equal to or larger than 2) delay elements connected in series, respectively, and in which an identical input signal is inputted to delay elements at a first stage and output signals of delay elements at a kth (k is an integer satisfying a condition 1≦k≦n−1) stage are inputted to delay elements at a k+1th stage and a detection circuit that has n edge detecting units and a readout unit and in which a jth (j is an integer satisfying a condition 1≦j≦n) edge detecting unit is inputted with an output signal of a delay element at a jth stage of the first delay circuit and an output signal of a delay element at an n−j+1th stage of the second delay circuit, detects whether periods of rising or falling changes of the two signals overlap, and counts a number of times of the detection, and the readout unit reads out the counted number of times of the detection.

REFERENCES:
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patent: 7463680 (2008-12-01), Buckwalter et al.
patent: 2001/0005156 (2001-06-01), Dosho
patent: 2002/0097075 (2002-07-01), Ono et al.
patent: 2005/0127894 (2005-06-01), Wyatt
patent: 2005/0163204 (2005-07-01), Brewer
patent: 2006/0126714 (2006-06-01), Lin et al.
patent: 10-267999 (1998-10-01), None

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